Late breaking results: Synthesizable 8-bit digital memristor emulator with programmable state retention for accelerated edge computing

Authors: BORAH, S - University Of Texas At Tyler; WALDECKER, P - University Of Texas At Tyler; SUNDARAVADIVEL, P - University Of Texas At Tyler; Torbert Iii, Henry

Submitted to: Meeting Abstract
Publication Type: Proceedings
Publication Acceptance Date: 4/10/2026
Publication Date: N/A
Citation: N/A

Interpretive Summary: Memristive devices are promising for neuromorphic and in-memory computing, but practical analog implementations often face variability and fabrication challenges. This work presents a synthesizable 8-bit digital memristor emulator implemented in Verilog and targeted for FPGA realization. The proposed architecture provides a compact and reproducible digital platform for architectural exploration of memristor-inspired computing systems, with scalability toward FPGA-based arrays for neuromorphic and edge computing applications.

Technical Abstract: Memristive devices are promising for neuromorphic and in-memory computing, but practical analog implementations often face variability and fabrication challenges. This work presents a synthesizable 8-bit digital memristor emulator implemented in Verilog and targeted for FPGA realization. The design employs a discrete-time, threshold-based state update mechanism with Q1.15 fixed-point arithmetic at 10 kHz sampling. Simulation results demonstrate frequency-dependent pinched hysteresis consistent with memristive behavior, as well as programmable SET/RESET resistance modulation and stable non-volatile retention under zero excitation. The bounded 8-bit state ensures deterministic operation suitable for hardware deployment. The proposed architecture provides a compact and reproducible digital platform for architectural exploration of memristor-inspired computing systems, with scalability toward FPGA-based arrays for neuromorphic and edge computing applications.